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NOIL2SM1300A
Table 4. POWER SUPPLY RATINGS (Notes 1, 2 and 3)
Boldface limits apply for T J = T MIN to T MAX , all other limits T J = +30 ° C. Clock = 315 MHz
Symbol
V RES_AB
(Note 4)
Power Supply
Antiblooming
Supply
Parameter
Operating Voltage
Dynamic Current
Condition
Clock enabled, lux = 0
Min
-10%
Typ
0.7
1
Max
+10%
Units
V
mA
Peak Current following
edge reset
Standby Current
Clock enabled, lux = 0
Shutdown mode, lux = 0
50
1
mA
mA
V RES_DS
Reset Dual
Slope Supply
Operating Voltage
Dynamic Current
Clock enabled, lux = 0
1.8
2.5
0.4
3.675
3
V
mA
Peak Current
Clock enabled, lux = 0
36
mA
V RES_TS
Reset Triple
Slope Supply
Operating Voltage
Dynamic Current
Clock enabled, lux = 0
1.8
2.2
0.3
3.675
2
V
mA
Peak Current
Clock enabled, lux = 0
14
mA
V MEM_L
Memory Element
low level supply
Operating Voltage
Dynamic Current
Clock enabled, lux = 0
-5%
2.5
0.2
+5%
1
V
mA
Peak Current during FOT
Peak Current during FOT
Clock enabled, lux = 0
Clock enabled, bright
62
30
mA
mA
V MEM_H
Memory Element
high level supply
Operating Voltage
Dynamic Current
Clock enabled, lux = 0
-5%
3.3
1
+5%
V
mA
Peak Current during FOT
Clock enabled, lux = 0
45
mA
V PRECH
(Note 4)
Pre_charge
Driver Supply
Operating Voltage
Dynamic Current
Clock enabled, lux = 0
-10%
0.7
0.3
+10%
3
V
mA
Peak Current during FOT
Peak Current during FOT
Clock enabled, lux = 0
Clock enabled, lux = bright
32
25
mA
mA
1. All parameters are characterized for DC conditions after thermal equilibrium is established.
2. The peak currents were measured without the load capacitor from the LDO (Low Dropout Regulator). The 100 nF capacitor bank was
connected to the pin in question.
3. This device contains circuitry to protect the inputs against damage due to high static voltages or electric fields. However, it is
recommended that normal precautions be taken to avoid application of any voltages higher than the maximum rated voltages to this
high ? impedance circuit.
4. The VRES_AB and VPRECH power supply should be designed to have a sourcing and sinking current capability for frame rates of
the order of 20k frames /sec.
Every module in the image sensor has its own power
supply and ground. The grounds can be combined
externally, but not all power supply inputs may be combined.
Some power supplies must be isolated to reduce electrical
crosstalk and improve shielding, dynamic range, and output
swing. Internal to the image sensor, the ground lines of each
module are kept separate to improve shielding and electrical
crosstalk between them.
The LUPA1300-2 contains circuitry to protect the inputs
against damage due to high static voltages or electric fields.
However, take normal precautions to avoid voltages higher
Table 5. POWER DISSIPATION (Note 1)
Power supply specifications according to Table 4.
than the maximum rated voltages in this high impedance
circuit. Unused inputs must always be tied to an appropriate
logic level, for example, V DD or GND. All cap_xxx pins
must be connected to ground through a 100 nF capacitor.
The recommended combinations of supplies are:
? Analog group of +2.5 V supply: V SAMPLE , V RES_DS ,
V MEM_L , V ADC , V pix , V ANA , V BUF
? Digital Group of +2.5 V supply: V DIG , V LVDS
? Combine V PRECH and V RES_AB to one supply (Note 4)
Symbol
Power STDBY
Power
Parameter
Standby Power
Average Power Dissipation
Condition
Blocks in standby with SPI upload
lux = 0, clock = 315 MHz, 500 fps
Typ
400
1350
Units
mW
mW
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